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? 2012-2013 microchip technology inc. ds20002322c-page 1 MCP6481/2/4 features ? low-input bias current - 150 pa (typical, t a = +125c) ? low quiescent current - 240 a/amplifier (typical) ? low-input offset voltage - 1.5 mv (maximum) ? supply voltage range: 2.2v to 5.5v ? rail-to-rail input/output ? gain bandwidth product: 4 mhz (typical) ? slew rate: 2.7 v/s (typical) ? unity gain stable ? no phase reversal ? small packages - singles in sc70-5, sot-23-5 ? extended temperature range - -40c to +125c applications ? photodiode amplifier ? ph electrode amplifier ? low leakage amplifier ? piezoelectric transducer amplifier ? active analog filter ? battery-powered signal conditioning design aids ? spice macro models ?filterlab ? software ? maps (microchip advanced part selector) ? analog demonstration and evaluation boards ? application notes description the microchip MCP6481/2/4 family of operational amplifiers (op amps) has low-input bias current (150 pa, typical at 125c) and rail-to-rail input and output operation. this family is unity gain stable and has a gain bandwidth product of 4 mhz (typical). these devices operate with a single-supply voltage as low as 2.2v, while only drawing 240 a/amplifier (typical) of quiescent current. these features make the family of op amps well suited for photodiode amplifier, ph electrode amplifier, low leakage amplifier, and battery- powered signal conditioning applications, etc. the MCP6481/2/4 family is offered in single (MCP6481), dual (mcp6482), quad (mcp6484) packages. all devices are designed using an advanced cmos process and fully specified in extended temperature range from -40c to +125c. related parts ? mcp6471/2/4: 2 mhz, low-input bias current op amps ? mcp6491/2/4: 7.5 mhz, low-input bias current op amps package types 5 4 1 2 3 v dd v in + v ss v out 1 2 3 45 6 7 8 mcp6482 2x3 tdfn* 1 2 3 4 8 7 6 5 * includes exposed thermal pad (ep); see table 3-1 . ep 9 1 2 3 411 12 13 14 5 4 1 2 3 MCP6481 sc70, sot-23 mcp6484 soic, tssop mcp6482 soic, msop v in ? v outa v ina ? v ina + v ss v inb + v inb ? v outb v dd v outa v ina ? v ina + v ss v inb + v inb ? v outb v dd 5 6 7 8 9 10 v outa v ina ? v ina + v dd v inb + v inb ? v outb v outc v outd v ind ? v inc ? v inc + v ind + v ss 4 mhz, low-input bias current op amps
MCP6481/2/4 ds20002322c-page 2 ? 2012-2013 microchip technology inc. typical application photodiode amplifier d 1 light v out v dd r 2 c 2 i d1 ? + mcp648x
? 2012-2013 microchip technology inc. ds20002322c-page 3 MCP6481/2/4 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ?v ss ............................................................................................................................... ..... .....................................................6.5v current at input pins .......................................................................................................... ...... ......................................................2 ma analog inputs (v in +, v in -)??........................................................................................................................... .v ss ? 1.0v to v dd +1.0v all other inputs and outputs .................................................................................................. .........................v ss ? 0.3v to v dd +0.3v difference input voltage....................................................................................................... ....................................................v dd ?v ss output short-circuit current ................................................................................................... ............. ...................................continuous current at output and supply pins ............................................................................................. .................. ..............................55 ma storage temperature ............................................................................................................ .... .....................................-65c to +150c maximum junction temperature (t j )................................................................................................................ .............. .............+150c esd protection on all pins (hbm) ??????????????????????????????????????????????????????????????? ??????????????????????????????????????????????????????????????? ?????????????????????????????????????? 4kv note 1: see section 4.1.2, input voltage limits . ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. 1.2 specifications table 1-1: dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +2.2v to +5.5v, v ss = gnd, t a = +25c, v cm =v dd /2, v out ? v dd /2, v l =v dd /2 and r l =10k ?? to v l . (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions input offset input offset voltage v os -1.5 ? +1.5 mv v dd = 3.0v, v cm =v dd /4 input offset drift with temperature ? v os / ? t a ?2.5?v/ct a = -40c to +125c power supply rejection ratio psrr 75 91 ? db v cm =v dd /4 input bias current and impedance input bias current i b ?1?pa ?8?pat a =+85c ? 150 350 pa t a = +125c input offset current i os ? 0.1 ? pa common mode input impedance z cm ?10 13 ||6 ? ? ||pf differential input impedance z diff ?10 13 ||6 ? ? ||pf common mode common mode input voltage range v cmr v ss -0.3 ? v dd +0.3 v common mode rejection ratio cmrr 65 87 ? db v cm = -0.3v to 2.5v, v dd =2.2v 70 89 ? db v cm = -0.3v to 5.8v, v dd =5.5v open-loop gain dc open-loop gain (large signal) a ol 95 115 ? db 0.2v < v out <(v dd ?0.2v) v dd = 5.5v, v cm =v ss
MCP6481/2/4 ds20002322c-page 4 ? 2012-2013 microchip technology inc. output high-level output voltage v oh 2.180 2.196 ? v v dd =2.2v 0.5v input overdrive 5.480 5.493 ? v v dd =5.5v 0.5v input overdrive low-level output voltage v ol ? 0.004 0.020 v v dd =2.2v 0.5 v input overdrive ? 0.007 0.020 v v dd =5.5v 0.5 v input overdrive output short-circuit current i sc ?12?mav dd =2.2v ?36?mav dd =5.5v power supply supply voltage v dd 2.2 ? 5.5 v quiescent current per amplifier i q 100 240 400 a i o =0, v cm =v dd /4 table 1-2: ac electrical specifications electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l = 20 pf. (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions ac response gain bandwidth product gbwp ? 4 ? mhz phase margin pm ? 60 ? g = +1v/v slew rate sr ? 2.7 ? v/s noise input noise voltage e ni ? 7 ? vp-p f = 0.1 hz to 10 hz input noise voltage density e ni ?23?nv/ ? hz f = 1 khz ?18?nv/ ? hz f = 10 khz input noise current density i ni ?0.6?fa/ ? hz f = 1 khz table 1-1: dc electrical specifications (continued) electrical characteristics : unless otherwise indicated, v dd = +2.2v to +5.5v, v ss = gnd, t a = +25c, v cm =v dd /2, v out ? v dd /2, v l =v dd /2 and r l =10k ?? to v l . (refer to figure 1-1 ). parameters sym. min. typ. max. units conditions table 1-3: temperature specifications electrical characteristics: unless otherwise indicated, v dd = +2.2v to +5.5v and v ss = gnd. parameters sym. min. typ. max. units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sc-70 ? ja ? 331 ? c/w thermal resistance, 5l-sot-23 ? ja ? 256 ? c/w thermal resistance, 8l-2x3 tdfn ? ja ?52.5?c/w thermal resistance, 8l-msop ? ja ?211?c/w thermal resistance, 8l-soic ? ja ?149.5?c/w thermal resistance, 14l-soic ? ja ?95.3?c/w thermal resistance, 14l-tssop ? ja ? 100 ? c/w note 1: the internal junction temperature (t j ) must not exceed the absolute maximum specification of +150c.
? 2012-2013 microchip technology inc. ds20002322c-page 5 MCP6481/2/4 1.3 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . this circuit can independently set v cm and v out (refer to equation 1-1 ). note that v cm is not the circuit?s common mode voltage ((v p +v m )/2), and that v ost includes v os plus the effects (on the input offset error, v ost ) of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. g dm r f r g ? = v cm v p v dd 2 ? + ?? 2 ? = v out v dd 2 ? ?? v p v m ? ?? v ost 1g dm + ?? ? ++ = where: g dm = differential mode gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in + v in ? ? = v dd r g r f v out v m c b2 c l r l v l c b1 100 k ? 100 k ? r g r f v dd /2 v p 100 k ? 100 k ? 20 pf 10 k ? 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf mcp648x
MCP6481/2/4 ds20002322c-page 6 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 7 MCP6481/2/4 2.0 typical performance curves note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-1: input offset voltage. figure 2-2: input offset voltage drift. figure 2-3: input offset voltage vs. common mode input voltage. figure 2-4: input offset voltage vs. common mode input voltage. figure 2-5: input offset voltage vs. output voltage. figure 2-6: input offset voltage vs. power supply voltage. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% -1200 -1000 -800 -600 -400 -200 0 200 400 600 800 1000 1200 percentage of occurrences input offset voltage (v) 270 samples v dd = 3.0v v cm = v dd /4 0% 3% 6% 9% 12% 15% 18% -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 percentage of occurrences input offset voltage drift (v/c) 270 samples v dd = 3.0v v cm = v dd /4 t a = -40 c to +125 c 400 -200 0 200 400 600 800 1000 u t offset voltage (v) +125c +85c +25c -40c -1000 -800 -600 - 400 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 inp u common mode input voltage (v) v dd = 2.2v representative part - 400 -200 0 200 400 600 800 1000 u t offset voltage (v) +125c +85c +25c -40c -1000 -800 -600 400 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 inp u common mode input voltage (v) v dd = 5.5v representative part - 400 -200 0 200 400 600 800 1000 t offset voltage (v) v dd = 5.5v v dd = 2.2v representative part -1000 -800 -600 400 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 inpu t output voltage (v) - 400 -200 0 200 400 600 800 1000 t offset voltage (v) +125c +85c +25c -40c -1000 -800 -600 - 400 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 inpu t power supply voltage (v) representative part
MCP6481/2/4 ds20002322c-page 8 ? 2012-2013 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-7: input noise voltage density vs. frequency. figure 2-8: input noise voltage density vs. common mode input voltage. figure 2-9: cmrr, psrr vs. frequency. figure 2-10: cmrr, psrr vs. ambient temperature. figure 2-11: input bias, offset currents vs. ambient temperature. figure 2-12: input bias current vs. common mode input voltage. 100 1,000 n oise voltage density (nv/ hz) 10 1.e-1 1.e+0 1.e+1 1.e+2 1.e+3 1.e+4 1.e+5 1.e+6 input n frequency (hz) 0.1 1 10 100 1k 10k 100k 1m 10 15 20 25 30 voltage noise density (nv/ hz) f = 10 khz 0 5 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 input common mode input voltage (v) f 10 khz v dd = 5.5 v 20 30 40 50 60 70 80 90 100 1.00e+01 1.00e+02 1.00e+ 03 1.00e+04 1.00e+05 1.00e+06 cmrr, psrr (db) frequency (hz) representative part 10 100 1k 10k 100k 1m cmrr psrr+ psrr- 80 85 90 95 100 105 mrr, psrr (db) psrr cmrr @ v dd = 5.5v @v =22v 65 70 75 -50 -25 0 25 50 75 100 125 c temperature (c) @v dd =2 . 2v 1 10 100 1000 s and offset currents (a) input bias current v dd = 5.5 v 1n 100p 10p 1p 0.01 0.1 25 35 45 55 65 75 85 95 105 115 125 input bia ambient temperature (c) input offset current 0.1p 0.01p 50 100 150 200 250 u t bias current (pa) t a = +125c t a = +85c v dd = 5.5 v -50 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 inp u common mode input voltage (v) a t a = +25c
? 2012-2013 microchip technology inc. ds20002322c-page 9 MCP6481/2/4 note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-13: quiescent current vs. ambient temperature. figure 2-14: quiescent current vs. common mode input voltage. figure 2-15: quiescent current vs. common mode input voltage. figure 2-16: quiescent current vs. power supply voltage. figure 2-17: open-loop gain, phase vs. frequency. figure 2-18: dc open-loop gain vs. ambient temperature. 200 225 250 275 300 q uiescent current (a/amplifier) v dd = 5.5v v dd = 2.2v 150 175 200 -50 -25 0 25 50 75 100 125 q ambient temperature (c) v cm = v dd /4 200 225 250 275 300 325 q uiescent current (a/amplifier) 150 175 200 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 q common mode input voltage (v) v dd = 2.2 v 200 225 250 275 300 325 q uiescent current (a/amplifier) 150 175 200 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 q common mode input voltage (v) v dd = 5.5v 100 150 200 250 300 350 q uiescent current (a/amplifier) +125c +85c +25c -40c 0 50 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 q power supply voltage (v) v cm = v dd /4 - 150 -120 -90 -60 -30 0 20 40 60 80 100 120 e n-loop phase () e n-loop gain (db) open-loop gain open-loop phase -210 -180 150 -20 0 20 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 op e op e frequency (hz) 1 10 100 1k 10k 100k 1m 10m 110 120 130 140 150 p en-loop gain (db) v dd = 2.2v v dd = 5.5v 90 100 110 -50 -25 0 25 50 75 100 125 dc o p temperature (c)
MCP6481/2/4 ds20002322c-page 10 ? 2012-2013 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-19: gain bandwidth product, phase margin vs. ambient temperature. figure 2-20: gain bandwidth product, phase margin vs. ambient temperature. figure 2-21: output short circuit current vs. power supply voltage. figure 2-22: output voltage swing vs. frequency. figure 2-23: output voltage headroom vs. output current. figure 2-24: output voltage headroom vs. output current. 30 40 50 60 70 3 4 5 6 7 p hase margin () n bandwidth product (mhz) gain bandwidth product phase margin 0 10 20 0 1 2 -50 -25 0 25 50 75 100 125 p gai n ambient temperature (c) v dd = 2.2v 30 40 50 60 70 3 4 5 6 7 p hase margin () n bandwidth product (mhz) gain bandwidth product phase margin 0 10 20 0 1 2 -50 -25 0 25 50 75 100 125 p gai n ambient temperature (c) v dd = 5.5v -20 -10 0 10 20 30 40 50 60 short circuit current (ma) 12 c -40c +25c +85c +125c -60 -50 -40 -30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 output power supply voltage (v) + 12 5 c +85c +25c -40c 1 10 t voltage swing (v p-p ) v dd = 2.2v v dd = 5.5v 0.1 100 1000 10000 100000 1000000 10000000 outpu t frequency (hz) 100 1k 10k 100k 1m 10m 1 10 100 1000 o ltage headroom (mv) v dd -v oh v ol -v ss v dd = 2.2v 0.1 1 0.01 0.1 1 10 output v o output current (ma) 1 10 100 1000 o ltage headroom (mv) v dd -v oh v ol -v ss v dd = 5.5v 0.1 1 0.01 0.1 1 10 100 output v o output current (ma)
? 2012-2013 microchip technology inc. ds20002322c-page 11 MCP6481/2/4 note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-25: output voltage headroom vs. ambient temperature. figure 2-26: output voltage headroom vs. ambient temperature. figure 2-27: slew rate vs. ambient temperature. figure 2-28: small signal non-inverting pulse response. figure 2-29: small signal inverting pulse response. figure 2-30: large signal non-inverting pulse response. 3 4 5 6 7 voltage headroom (mv) v dd -v oh v ol -v ss 0 1 2 -50 -25 0 25 50 75 100 125 output temperature (c) v dd = 2.2v 3 4 5 6 7 8 9 10 voltage headroom (mv) v dd -v oh v ol -v ss 0 1 2 3 -50 -25 0 25 50 75 100 125 output temperature (c) v dd = 5.5v 15 2.0 2.5 3.0 3.5 4.0 4.5 s lew rate (v/s) falling edge, v dd = 5.5v rising edge, v dd = 5.5v 0.0 0.5 1.0 1 . 5 -50 -25 0 25 50 75 100 125 s temperature (c) falling edge, v dd = 2.2 v rising edge, v dd = 2.2v voltage (10 mv/div) v 5v output time (0.5 s/div) v dd = 5v g = +1 v/v voltage (10 mv/div) v dd = 5 v g = -1 v/v output time (0.5 s/div) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 t put voltage (v) 0.0 0.5 1.0 1.5 ou t time (2 s/div) v dd = 5 v g = +1 v/v
MCP6481/2/4 ds20002322c-page 12 ? 2012-2013 microchip technology inc. note: unless otherwise indicated, t a =+25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm =v dd /2, v out ? v dd /2, v l =v dd /2, r l =10k ?? to v l and c l =20pf. figure 2-31: large signal inverting pulse response. figure 2-32: the MCP6481/2/4 shows no phase reversal. figure 2-33: closed loop output impedance vs. frequency. figure 2-34: measured input current vs. input voltage (below v ss ). figure 2-35: channel-to-channel separation vs. frequency (mcp6482/4 only). 2.0 2.5 3.0 3.5 4.0 4.5 5.0 t put voltage (v) v dd = 5 v g = -1 v/v 0.0 0.5 1.0 1.5 ou t time (2 s/div) 2 3 4 5 6 utput voltages (v) v 5v v out v in -1 0 1 input, o time (1 ms/div) v dd = 5v g = +2 v/v 10 100 1000 o sed loop output impedance ( : ) g n : 101 v/v 1 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 cl o frequency (hz) 101 v/v 11 v/v 1 v/v 100 1k 10k 100k 1m 10m 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 1.0e+09 -i in (pa) 1m 100 10 1 100n 10n 1 +125c +85c +25c 1.0e+01 1.0e+02 1.0e+03 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 v in (v) 1 n 100p 10p -40c 50 60 70 80 90 100 h annel to channel separation (db) 20 30 40 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 c h frequency (hz) 100 1k 10k 100k 1m input referred
? 2012-2013 microchip technology inc. ds20002322c-page 13 MCP6481/2/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . 3.1 analog outputs the output pins are low-impedance voltage sources. 3.2 analog inputs the non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.3 power supply pins the positive power supply (v dd ) is 2.2v to 5.5v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in single-supply operation. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. 3.4 exposed thermal pad (ep) there is an internal electrical connection between the exposed thermal pad (ep) and the v ss pin; they must be connected to the same potential on the printed circuit board (pcb). this pad can be connected to a pcb ground plane to provide a larger heat sink. this improves the package thermal resistance ( ? ja ). table 3-1: pin function table MCP6481 mcp6482 mcp6484 symbol description sc70, sot-23 soic, msop 2x3 tdfn soic, tssop 1111v out , v outa analog output (op amp a) 4222v in ?, v ina ? inverting input (op amp a) 3333v in +, v ina + non-inverting input (op amp a) 5884v dd positive power supply ?555v inb + non-inverting input (op amp b) ?666v inb ? inverting input (op amp b) ?777v outb analog output (op amp b) ???8v outc analog output (op amp c) ???9v inc ? inverting input (op amp c) ???10v inc + non-inverting input (op amp c) 24411v ss negative power supply ???12v ind + non-inverting input (op amp d) ???13v ind ? inverting input (op amp d) ???14v outd analog output (op amp d) ? ? 9 ? ep exposed thermal pad (ep); must be connected to v ss .
MCP6481/2/4 ds20002322c-page 14 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 15 MCP6481/2/4 4.0 application information the MCP6481/2/4 family of op amps is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, high-precision applications. 4.1 inputs 4.1.1 phase reversal the MCP6481/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-32 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see section 1.1 ?absolute maximum ratings ?? ). the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors against many (but not all) overvoltage conditions, and to minimize the input bias current (i b ). figure 4-1: simplified analog input esd structures. the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltages that go well above v dd . their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow overvoltage (beyond v dd ) events. very fast esd events (that meet the specification) are limited so that damage does not occur. in some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; figure 4-2 shows one approach to protect these inputs. figure 4-2: protecting the analog inputs. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ), as shown in figure 2-34 . 4.1.3 input current limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents into the input pins (see section 1.1 ?absolute maximum ratings ?? ). figure 4-3 shows one approach to protect these inputs. the r 1 and r 2 resistors limit the possible currents in or out of the input pins (and the esd diodes, d 1 and d 2 ). the diode currents will go through either v dd or v ss . figure 4-3: protecting the analog inputs. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 v dd d 1 v 2 d 2 mcp648x v out v 1 r 1 v dd d 1 v 2 r 2 d 2 r 3 v out mcp648x min (r 1 ,r 2 ) > v ss ?min(v 1 ,v 2 ) 2ma min (r 1 ,r 2 )> max(v 1 ,v 2 )?v dd 2ma
MCP6481/2/4 ds20002322c-page 16 ? 2012-2013 microchip technology inc. 4.1.4 normal operation the inputs of the MCP6481/2/4 op amps use two differential input stages in parallel. one operates at a low common mode input voltage (v cm ), while the other operates at a high v cm . with this topology, the device operates with a v cm up to 0.3v above v dd and 0.3v below v ss (refer to figures 2-3 and 2-4 ). the input offset voltage is measured at v cm =v ss ?0.3v and v dd + 0.3v to ensure proper operation. the transition between the input stages occurs when v cm is near v dd ? 1.2v (refer to figures 2-3 and 2-4 ). for the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. 4.2 rail-to-rail output the output voltage range of the MCP6481/2/4 op amps is 0.007v (typical) and 5.493v (typical) when r l =10k ? is connected to v dd /2 and v dd =5.5v. refer to figures 2-23 and 2-24 for more information. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces gain peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1v/v) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = + 1v/v), a small series resistor at the output (r iso in figure 4-4 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will generally be lower than the bandwidth with no capacitance load. figure 4-4: output resistor, r iso stabilizes large capacitive loads. figure 4-5 gives the recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit?s noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1 + |signal gain| (e.g., -1v/v gives g n =+2v/v). after selecting r iso for your circuit, double check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the MCP6481/2/4 spice macro model are helpful. figure 4-5: recommended r iso values for capacitive loads. 4.4 supply bypass with this family of operational amplifiers, the power supply pin (v dd for single supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high-frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. v in r iso v out c l ? + mcp648x 10 100 1000 o mmended r iso ( : ) g n : 1 v/v 2 v/v t 5v/v v dd = 5.5 v r l = 10 k 1 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 rec o normalized load capacitance; c l /g n (f) t 5 v/v 10p 100p 1n 10n 0.1 1
? 2012-2013 microchip technology inc. ds20002322c-page 17 MCP6481/2/4 4.5 unused op amps an unused op amp in a quad package (mcp6484) should be configured as shown in figure 4-6 . these circuits prevent the output from toggling and causing crosstalk. circuit a sets the op amp at its minimum noise gain. the resistor divider produces any desired reference voltage within the output voltage range of the op amp, and the op amp buffers that reference voltage. circuit b uses the minimum number of components and operates as a comparator, but it may draw more current. figure 4-6: unused op amps. 4.6 pcb surface leakage in applications where low-input bias current is critical, pcb surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low-humidity conditions, a typical resistance between nearby traces is 10 12 ? . a 5v difference would cause 5 pa of current to flow, which is greater than the MCP6481/2/4 family?s bias current at +25c (1 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-7 . figure 4-7: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a.connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b.connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance gain amplifiers (convert current to voltage, such as photo detectors): a.connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b.connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. v dd v dd r 1 r 2 v dd v ref v ref v dd r 2 r 1 r 2 + -------------------- ? = ? mcp6484 (a) ? mcp6484 (b) guard ring v in ?v in + v ss
MCP6481/2/4 ds20002322c-page 18 ? 2012-2013 microchip technology inc. 4.7 application circuits 4.7.1 photo detection the MCP6481/2/4 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). this is implemented with a single resistor (r 2 ) in the feedback loop of the amplifiers shown in figure 4-8 and figure 4-9 . the optional capacitor (c 2 ) sometimes provides stability for these circuits. a photodiode configured in the photovoltaic mode has zero voltage potential placed across it ( figure 4-8 ). in this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. the key amplifier specifications for this application are: low-input bias current, common mode input voltage range (including ground), and rail-to-rail output. figure 4-8: photovoltaic mode detector. in contrast, a photodiode that is configured in the photoconductive mode has a reverse bias voltage across the photo-sensing element ( figure 4-9 ). this decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). however, the reverse bias voltage also increased diode leakage current and caused linearity errors. figure 4-9: photoconductive mode detector. 4.7.2 active low pass filter the MCP6481/2/4 op amps? low-input bias current makes it possible for the designer to use larger resistors and smaller capacitors for active low-pass filter applications. however, as the resistance increases, the noise generated also increases. parasitic capacitances and the large value resistors could also modify the frequency response. these trade-offs need to be considered when selecting circuit elements. usually, the op amp bandwidth is 100x the filter cutoff frequency (or higher) for good performance. it is possible to have the op amp bandwidth 10x higher than the cutoff frequency, thus having a design that is more sensitive to component tolerances. figure 4-10 and figure 4-11 show low-pass, second- order, butterworth filters with a cutoff frequency of 10 hz. the filter in figure 4-10 has a non-inverting gain of +1 v/v, and the filter in figure 4-11 has an inverting gain of -1 v/v. figure 4-10: second-order, low-pass butterworth filter with sallen-key topology. figure 4-11: second-order, low-pass butterworth filter with multiple-feedback topology. d 1 light v out v dd r 2 c 2 i d1 v out = i d1 *r 2 ? + mcp648x d 1 light v out v dd r 2 c 2 i d1 v out = i d1 *r 2 v bias v bias < 0v ? + mcp648x c 2 v out r 1 r 2 c 1 v in 47 nf 768 k ? 1.27 m ? 22 nf f p = 10 hz, g = +1 v/v + ? mcp648x c 2 v out r 1 r 3 c 1 v in r 2 v dd /2 f p = 10 hz, g = -1 v/v 618 k ? 618 k ? 1.00 m ? 8.2 nf 47 nf ? + mcp648x
? 2012-2013 microchip technology inc. ds20002322c-page 19 MCP6481/2/4 4.7.3 ph electrode amplifier the MCP6481/2/4 op amps can be used for sensing applications where the sensor has high output impedance, such as a ph electrode sensor; its output impedance is in the range of 1 m ? to 1g ? . the key op amp specifications for these kinds of applications are low-input bias current and high input impedance. a typical sensing circuit is shown in figure 4-12, it is implemented with a non-inverting amplifier which has a gain of 1+r 2 /r 1 . the input voltage error due to input bias current is equal to i b *r out , which is amplified by 1+r 2 /r 1 at the output. to minimize the voltage error and get the v out with better accuracy, the i b must be small enough. figure 4-12: ph electrode amplifier. v out r 1 r 2 v in + ? ph electrode v sen v sen is the sensed voltage by ph electrode r out is the ph electrode?s output impedance + ? r out mcp648x
MCP6481/2/4 ds20002322c-page 20 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 21 MCP6481/2/4 5.0 design aids microchip technology inc. provides the basic design tools needed for the MCP6481/2/4 family of op amps. 5.1 spice macro model the latest spice macro model for the MCP6481/2/4 op amps is available on the microchip web site at www.microchip.com . the model was written and tested in pspice, owned by orcad (cadence ? ). for other simulators, translation may be required. the model covers a wide aspect of the op amp?s electrical specifications. not only does the model cover voltage, current and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. the model has not been verified outside the specification range listed in the op amp data sheet. the model behaviors under these conditions cannot be guaranteed to match the actual op amp performance. moreover, the model is intended to be an initial design tool. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab software microchip?s filterlab software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.microchip.com/filterlab , the filterlab design tool provides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 maps (microchip advanced part selector) maps is a software tool that helps semiconductor professionals efficiently identify microchip devices that fit a particular design requirement. available at no cost, maps is an overall selection tool for microchip?s prod- uct portfolio that includes analog, memory, mcus and dscs. using this tool, you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for data sheets, purchases and sampling of microchip parts. the web site is available at w ww.microchip.com/maps. 5.4 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluation boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web site: www.microchip.com/analogtools . some boards that are especially useful include: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, part number vsupev2 ? 8-pin soic/msop/tssop/ dip evaluation board, part number soic8ev 5.5 application notes the following microchip analog design note and application notes are available on the microchip web site at www.microchip.com/appnotes , and are recommended as supplemental reference resources. ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 ? an1297: ?microchip?s op amp spice macro models?? ds01297 ? an1332: ?current sensing circuit concepts and fundamentals?? ds01332 ? an1494: ?using mcp6491 op amps for photodetection applications" ds01494 these application notes and others are listed in: ? ?signal chain design guide?, ds21825
MCP6481/2/4 ds20002322c-page 22 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 23 MCP6481/2/4 6.0 packaging information 6.1 package marking information 5-lead sot-23 (MCP6481 only) example 3f25 part number code MCP6481t-e/ot 3fnn 5-lead sc-70 (MCP6481 only) example dq25 8-lead soic (3.90 mm) (mcp6482 only) example mcp6482 e/sn1320 256 part number code MCP6481t-e/lty dqnn 8-lead msop (3x3 mm) (mcp6482 only) example 6482e 320256 note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. 3 e 3 e
MCP6481/2/4 ds20002322c-page 24 ? 2012-2013 microchip technology inc. 8-lead tdfn (2x3x0.75 mm) (mcp6482 only) example aan 320 25 part number code mcp6482t-e/mny aan 14-lead soic (3.90 mm) (mcp6484 only) example mcp6484 e/sl 1320256 14-lead tssop (4.4 mm) (mcp6484 only) example yyww nnn xxxxxxxx 6484e/st 1320 256
? 2012-2013 microchip technology inc. ds20002322c-page 25 MCP6481/2/4 5-lead plastic small outine transistor (lty) [sc70] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technology drawing c04-083b d b 1 2 3 e1 e 4 5 ee c l a1 aa2
MCP6481/2/4 ds20002322c-page 26 ? 2012-2013 microchip technology inc. 5-lead plastic small outine transistor (lty) [sc70] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 27 MCP6481/2/4 n b e e1 d 1 2 3 e e1 a a1 a2 c l l1
MCP6481/2/4 ds20002322c-page 28 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 29 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 30 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 31 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 32 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 33 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 34 ? 2012-2013 microchip technology inc.
? 2012-2013 microchip technology inc. ds20002322c-page 35 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 36 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 37 MCP6481/2/4
MCP6481/2/4 ds20002322c-page 38 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 39 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 40 ? 2012-2013 microchip technology inc.
? 2012-2013 microchip technology inc. ds20002322c-page 41 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 42 ? 2012-2013 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012-2013 microchip technology inc. ds20002322c-page 43 MCP6481/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
MCP6481/2/4 ds20002322c-page 44 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 45 MCP6481/2/4 appendix a: revision history revision c (june 2013) the following is the list of modifications: 1. added new devices to the family (mcp6482 and mcp6484) and related information throughout the document. 2. updated thermal package resistance information in tab l e 1 - 3 . 3. added figure 2-35 in section 2.0, typical per- formance curves . 4. updated section 3.0, pin descriptions . 5. added new section 4.5, unused op amps . 6. updated the list of reference documents in section 5.5, application notes . 7. added package markings and drawings for the mcp6482 and mcp6484 devices. 8. updated product identification system . revision b (october 2012) the following is the list of modifications: 1. updated the maximum low input offset voltage value in the section ?features? . 2. updated the minimum and maximum input offset voltage in table 1-1 ?dc electrical specifications? . 3. replaced figure 2-1: ?input offset voltage.? revision a (september 2012) ? original release of this document.
MCP6481/2/4 ds20002322c-page 46 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 47 MCP6481/2/4 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: MCP6481t: single op amp (tape and reel) (sc70, sot-23) mcp6482: dual op amp (soic and msop only) mcp6482t: dual op amp (tape and reel) (soic, msop and 2x3 tdfn) mcp6484: quad op amp mcp6484t: quad op amp (tape and reel) (soic and tssop) temperature range: e = -40c to +125c (extended) package: lty = plastic package (sc70), 5-lead ot = plastic small outline transistor, (sot-23), 5-lead mny* = plastic dual flat, no lead, (2x3 tdfn), 8-lead (tdfn) sn = lead plastic small outline (150 mil body), 8-lead (soic) ms = plastic msop, 8-lead sl = plastic small outline, (150 mil body), 14-lead (soic) st = plastic thin shrink small outline (150 mil body), 14-lead (tssop) * y = nickel palladium gold manufacturing designator. only available on the tdfn package. part no. /xx package temperature range device examples: a) MCP6481t-e/lty: tape and reel, extended temp., 5ld sc70 package b) MCP6481t-e/ot: tape and reel, extended temp., 5ld sot-23 package c) mcp6482-e/ms: extended temp., 8ld msop package d) mcp6482t-e/ms: tape and reel, extended temp., 8ld msop package e) mcp6482-e/sn: extended temp., 8ld soic package f) mcp6482t-e/sn: tape and reel, extended temp., 8ld soic package g) mcp6482t-e/mny: tape and reel, extended temp., 8ld 2x3 tdfn package h) mcp6484-e/sl: extended temp., 14ld soic package i) mcp6484t-e/sl: tape and reel, extended temp., 14ld soic package j) mcp6484-e/st: extended temp., 14ld tssop package k) mcp6484t-e/st: tape and reel, extended temp., 14ld tssop package -x
MCP6481/2/4 ds20002322c-page 48 ? 2012-2013 microchip technology inc. notes:
? 2012-2013 microchip technology inc. ds20002322c-page 49 MCP6481/2/4 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2012-2013, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == 978-1-62077-246-1
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